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 TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
D D D D D D
Output Swing Includes Both Supply Rails Low Noise . . . 12 nV/Hz Typ at f = 1 kHz Low Input Bias Current . . . 1 pA Typ Fully Specified for Both Single-Supply and Split-Supply Operation Low Power . . . 500 A Max Common-Mode Input Voltage Range Includes Negative Rail
D Low Input Offset Voltage D D D
950 V Max at TA = 25C (TLV226xA) Wide Supply Voltage Range 2.7 V to 8 V Macromodel Included Available in Q-Temp Automotive HighRel Automotive Applications Configuration Control / Print Support Qualification to Automotive Standards
HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT
4 VDD = 3 V 3.5
description
The TLV2262 and TLV2264 are dual and quad low voltage operational amplifiers from Texas Instruments. Both devices exhibit rail-to-rail output performance for increased dynamic range in single or split supply applications. The TLV226x family offers a compromise between the micropower TLV225x and the ac performance of the TLC227x. It has low supply current for batterypowered applications, while still having adequate ac performance for applications that demand it. This family is fully characterized at 3 V and 5 V and is optimized for low-voltage applications. The noise performance has been dramatically improved over previous generations of CMOS amplifiers. Figure 1 depicts the low level of noise voltage for this CMOS amplifier, which has only 200 A (typ) of supply current per amplifier.
VOH - High-Level Output Voltage - V
3 2.5 TA = 125C 2 TA = 25C 1.5 1 0.5 TA = 85C TA = - 40C TA = - 55C
0 The TLV226x, exhibiting high input impedance 0 500 1000 1500 2000 and low noise, are excellent for small-signal | IOH | - High-Level Output Current - A conditioning for high-impedance sources, such as Figure 1 piezoelectric transducers. Because of the micropower dissipation levels combined with 3-V operation, these devices work well in hand-held monitoring and remote-sensing applications. In addition, the rail-to-rail output feature with single or split supplies makes this family a great choice when interfacing with analog-to-digital converters (ADCs). For precision applications, the TLV226xA family is available and has a maximum input offset voltage of 950 V.
The TLV2262/4 also makes great upgrades to the TLV2332/4 in standard designs. They offer increased output dynamic range, lower noise voltage and lower input offset voltage. This enhanced feature set allows them to be used in a wider range of applications. For applications that require higher output drive and wider input voltage range, see the TLV2432 and TLV2442 devices. If your design requires single amplifiers, please see the TLV2211/21/31 family. These devices are single rail-to-rail operational amplifiers in the SOT-23 package. Their small size and low power consumption make them ideal for high density, battery-powered equipment.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Advanced LinCMOS is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
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AA AA
Copyright 1997-2006, Texas Instruments Incorporated
On products compliant to MIL PRF 38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
1
SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
TLV2262 AVAILABLE OPTIONS PACKAGED DEVICES TA VIOmax AT 25C 2.5 mV 950 V 2.5 mV 950 V 2.5 mV 950 V 2.5 mV SMALL OUTLINE (D) TLV2262CD TLV2262AID TLV2262ID TLV2262AQD TLV2262QD -- -- CHIP CARRIER (FK) -- -- -- -- -- TLV2262AMFK TLV2262MFK CERAMIC DIP (JG) -- -- -- -- -- TLV2262AMJG TLV2262MJG PLASTIC DIP (P) TLV2262CP TLV2262AIP TLV2262IP -- -- -- -- TSSOP (PW) TLV2262CPWLE TLV2262AIPWLE -- -- -- -- -- CERAMIC FLATPACK (U) -- -- -- -- -- TLV2262AMU TLV2262MU
0C to 70C -40C to 125C -40C to 125C -55C to 125C
The D packages are available taped and reeled. Add R suffix to device type (e.g., TLV2262CDR). The PW package is available only left-end taped and reeled. Chips are tested at 25C. For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. TLV2264 AVAILABLE OPTIONS PACKAGED DEVICES TA VIOmax AT 25C 950 V 2.5 mV 950 V 2.5 mV 950 V 2.5 mV SMALL OUTLINE (D) TLV2264AID TLV2264ID TLV2264AQD TLV2264QD -- -- CHIP CARRIER (FK) -- -- -- -- TLV2264AMFK TLV2264MFK CERAMIC DIP (J) -- -- -- -- TLV2264AMJ TLV2264MJ PLASTIC DIP (N) TLV2264AIN TLV2264IN -- -- -- -- TSSOP (PW) TLV2264AIPWLE -- -- -- -- -- CERAMIC FLATPACK (W) -- -- -- -- TLV2264AMW TLV2264MW
-40 C -40C to 125C -40 C -40C to 125C -55C to 125C
The D packages are available taped and reeled. Add R suffix to device type (e.g., TLV2262IDR). The PW package is available only left-end taped and reeled. Chips are tested at 25C. For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com.
2
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TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV2262C, TLV2262AC TLV2262I, TLV2262AI TLV2262Q, TLV2262AQ D, P, OR PW PACKAGE (TOP VIEW)
TLV2264I, TLV2264AI TLV2264Q, TLV2264AQ D, N, OR PW PACKAGE (TOP VIEW)
1OUT 1IN - 1IN + VDD - /GND
1 2 3 4
8 7 6 5
VDD + 2OUT 2IN - 2IN +
TLV2262M, TLV2262AM JG PACKAGE (TOP VIEW)
1OUT 1IN - 1IN + VDD + 2IN + 2IN - 2OUT
1 2 3 4 5 6 7
14 13 12 11 10 9 8
4OUT 4IN - 4IN + VDD - / GND 3IN + 3IN - 3OUT
1OUT 1IN - 1IN + VDD - /GND
1 2 3 4
8 7 6 5
VDD + 2OUT 2IN - 2IN +
TLV2264M, TLV2264AM J OR W PACKAGE (TOP VIEW)
TLV2662M, TLV2262AM U PACKAGE (TOP VIEW)
NC 1OUT 1IN - 1IN + VCC - /GND
1 2 3 4 5
10 9 8 7 6
NC VCC + 2OUT 2IN - 2IN +
1OUT 1IN - 1IN + VDD + 2IN + 2IN - 2OUT
1 2 3 4 5 6 7
14 13 12 11 10 9 8
4OUT 4IN - 4IN + VDD - / GND 3IN + 3IN - 3OUT
TLV2264M, TLV2264AM FK PACKAGE (TOP VIEW)
TLV2262M, TLV2262AM FK PACKAGE (TOP VIEW)
NC 1IN - NC 1IN + NC
3 2 1 20 19 18 4 5 6 7 8 17 16 15 14 9 10 11 12 13
NC 2OUT NC 2IN - NC
1IN + NC VCC + NC 2IN +
4 5 6 7 8
3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
1IN - 1OUT NC 4OUT 4IN - 4IN + NC VCC - /GND NC 3IN +
NC 1OUT NC VDD+ NC
NC VDD- /GND NC 2IN+ NC
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2IN - 2OUT NC 3OUT 3IN -
3
SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
4 VDD + Q3 Q6 Q9 Q12 Q14 Q16 R6 C1 R5 Q1 Q13 Q4 Q15 Q17 OUT D1 Q2 R3 R4 Q5 Q7 Q8 Q10 Q11 R1 R2 VDD -/ GND ACTUAL DEVICE COMPONENT COUNT COMPONENT Transistors Resistors Diodes Capacitors TLV2252 38 28 9 3 TLV2254 76 54 18 6 Includes both amplifiers and all ESD, bias, and trim circuitry
equivalent schematic (each amplifier)
IN +
Template Release Date: 7-11-94
IN -
POST OFFICE BOX 655303 * DALLAS, TEXAS 75265
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDD Input voltage range, VI (any input, see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDD - -0.3 V to VDD+ Input current, II (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 mA Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Total current into VDD + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Total current out of VDD - . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Duration of short-circuit current (at or below) 25C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA: I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to 125C Q suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to 125C M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55C to 125C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to VDD - . 2. Differential voltages are at the noninverting input with respect to the inverting input. Excessive current flows when input is brought below VDD - - 0.3 V. 3. The output may be shorted to either supply. Temperature and /or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded. DISSIPATION RATING TABLE PACKAGE D-8 D-14 FK J JG N P PW-8 PW-14 U W TA 25C 25 C POWER RATING 725 mW 950 mW 1375 mW 1375 mW 1050 mW 1150 mW 1000 mW 525 mW 700 mW 700 mW 700 mW DERATING FACTOR ABOVE TA = 25C 5.8 mW/C 7.6 mW/C 11.0 mW/C 11.0 mW/C 8.4 mW/C 9.2 mW/C 8.0 mW/C 4.2 mW/C 5.6 mW/C 5.5 mW/C 5.5 mW/C TA = 85C 85 C POWER RATING 377 mW 494 mW 715 mW 715 mW -- 598 mW 520 mW 273 mW 364 mW -- 370 mW TA = 125C 125 C POWER RATING 145 mW 190 mW 275 mW 275 mW 210 mW -- 200 mW 105 mW -- 150 mW 150 mW
recommended operating conditions
I SUFFIX MIN Supply voltage, VDD (see Note 1) Input voltage range, VI Common-mode input voltage, VIC 2.7 VDD - VDD - MAX 8 Q SUFFIX MIN 2.7 MAX 8 M SUFFIX MIN 2.7 MAX 8 VDD + - 1.3 VDD + - 1.3 125 UNIT V V V C
Operating free-air temperature, TA -40 NOTE 1: All voltage values, except differential voltages, are with respect to VDD - .
VDD + - 1.3 VDD - VDD + - 1.3 VDD - 125 -40
VDD + - 1.3 VDD - VDD + - 1.3 VDD - 125 -55
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SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
TLV2262I electrical characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted)
PARAMETER VIO VIO Input offset voltage Temperature coefficient of input offset voltage Input offset voltage long-term drift (see Note 4) IIO Input offset current TEST CONDITIONS TA 25C Full range 25C to 85C 25C 25C 85C Full range 25C IIB Input bias current 85C Full range 25C VICR Common-mode input voltage range RS = 50 , |VIO | 5 mV Full range IOH = - 20 A VOH High-level output voltage IOH = - 100 A IOH = - 400 A VIC = 1.5 V, VOL Low-level output voltage VIC = 1.5 V, VIC = 1.5 V, Large-signal differential voltage amplification Differential input resistance Common-mode input resistance Common-mode input capacitance Closed-loop output impedance Common-mode rejection ratio Supply voltage rejection ratio (VDD/VIO) f = 10 kHz, f = 100 kHz, P package AV = 10 IOL = 50 A IOL = 500 A IOL = 1 mA 25C 25C Full range 25C Full range 25C 25C Full range 25C Full range 25C Full range 25C 25C 25C 25C 25C 25C Full range 25C Full range 65 60 80 80 95 60 30 100 1012 1012 8 270 75 65 60 80 80 100 100 200 300 60 30 100 1012 1012 8 270 77 pF dB dB 100 V/mV 2.85 2.825 2.7 2.65 10 100 150 200 300 0 to 2 0 to 1.7 2.99 2.85 2.825 2.7 2.65 10 100 150 mV V -0.3 to 2.2 1 2 TLV2262I MIN TYP 300 MAX 2500 3000 2 TLV2262AI MIN TYP 300 MAX 950 1500 UNIT V V/C V/mo 60 150 800 1 60 150 800 0 to 2 0 to 1.7 2.99 -0.3 to 2.2 pA pA
VDD = 1.5 V, VIC = 0, VO = 0, RS = 50
0.003 0.5 60 150 800 60 150 800
0.003 0.5
V
AVD
RL = 50 k VIC = 1.5 V, VO = 1 V to 2 V RL = 1 M
ri(d) ri(c) ci(c) zo CMRR kSVR
VIC = 0 to 1.7 V, VO = 1.5 V, RS = 50 VDD = 2.7 V to 8 V, VIC = VDD /2, No load
Full range is - 40C to 125C. Referenced to 1.5 V NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
6
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SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV2262I electrical characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted) (continued)
PARAMETER IDD Supply current TEST CONDITIONS VO = 1.5 V, No load TA 25C Full range TLV2262I MIN TYP 400 MAX 500 500 TLV2262AI MIN TYP 400 MAX 500 500 UNIT A
Full range is - 40C to 125C.
TLV2262I operating characteristics at specified free-air temperature, VDD = 3 V
PARAMETER TEST CONDITIONS RL = 50 k, TA 25C Full range 25C 25C 25C 25C 25C VO = 0.5 V to 2.5 V, f = 20 kHz, RL = 50 k f = 1 kHz, CL = 100 pF VO(PP) = 1 V, RL = 50 k, AV = - 1, Step = 1 V to 2 V, RL = 50 k, CL = 100 pF RL = 50 k, AV = 1 25C AV = 10 RL = 50 k, AV = 1, CL = 100 pF To 0.1% 25C To 0.01% 25C 25C 12.5 55 11 12.5 55 11 dB 25C 0.05% 0.67 0.05% 0.67 MHz TLV2262I MIN 0.35 0.3 43 12 0.6 1 0.6 0.03% TYP 0.55 MAX MIN 0.35 0.3 43 12 0.6 1 0.6 0.03% V V nV/Hz TLV2262AI TYP 0.55 V/s MAX UNIT
SR
Slew rate at unity gain
VO = 1.1 V to 1.9 V, CL = 100 pF f = 10 Hz f = 1 kHz f = 0.1 Hz to 1 Hz f = 0.1 Hz to 10 Hz
Vn
Equivalent input noise voltage Peak-to-peak equivalent input noise voltage Equivalent input noise current Total harmonic distortion plus noise Gain-bandwidth product
VN(PP) In
fA /Hz
THD + N
BOM
Maximum output-swing bandwidth
25C
395
395
kHz
5.6
5.6 s s
ts
Settling time
m
Phase margin at unity gain
CL = 100 pF
Gain margin Full range is - 40C to 125C. Referenced to 1.5 V
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SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
TLV2262I electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)
PARAMETER VIO VIO Input offset voltage Temperature coefficient of input offset voltage Input offset voltage long-term drift (see Note 4) IIO Input offset current TEST CONDITIONS TA 25C Full range 25 C 25C to 85C 25C 25C 85C Full range 25C IIB Input bias current 85C Full range 25C 25 C VICR Common-mode input voltage range |VIO | 5 mV, RS = 50 Full range IOH = - 20 A VOH High-level output voltage IOH = - 100 A IOH = - 400 A VIC = 2.5 V, VOL Low-level output voltage VIC = 2.5 V, VIC = 2.5 V, Large-signal differential voltage amplification Differential input resistance Common-mode input resistance Common-mode input capacitance Closed-loop output impedance Common-mode rejection ratio Supply voltage rejection ratio (VDD /VIO) f = 10 kHz, f = 100 kHz, P package AV = 10 IOL = 50 A IOL = 500 A IOL = 1 mA 25C 25C Full range 25C Full range 25C 25C Full range 25C Full range 25C Full range 25C 25C 25C 25C 25C 25C Full range 25C Full range 70 70 80 80 95 80 55 550 1012 1012 8 240 83 70 70 80 80 95 dB 170 0.2 4.85 4.82 4.7 4.6 0.01 0.09 0.15 0.15 0.3 0.3 80 55 550 1012 1012 8 240 83 pF dB 170 V/mV 0.2 4.85 0 to 4 0 to 3.5 -0.3 to 4.2 1 2 TLV2262I MIN TYP 300 MAX 2500 3000 2 TLV2262AI MIN TYP 300 MAX 950 1500 UNIT V V/C V/mo 60 150 800 1 60 150 800 0 to 4 0 to 3.5 4.85 4.82 4.7 4.6 0.01 0.09 0.15 0.15 0.3 0.3 V 4.85 -0.3 to 4.2 pA pA
VDD = 2.5 V, VIC = 0, VO = 0, RS = 50
0.003 0.5 60 150 800 60 150 800
0.003 0.5
V
4.99 4.94
4.99 4.94 V
AVD
RL = 50 k VIC = 2.5 V, VO = 1 V to 4 V RL = 1 M
ri(d) ri(c) ci(c) zo CMRR kSVR
VIC = 0 to 2.7 V, VO = 2.5 V, RS = 50 VDD = 4.4 V to 8 V, VIC = VDD /2, No load
Full range is - 40C to 125C. Referenced to 2.5 V NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
8
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SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV2262I electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) (continued)
PARAMETER IDD Supply current TEST CONDITIONS VO = 2.5 V, No load TA 25C Full range Full range is - 40C to 125C. TLV2262I MIN TYP 400 MAX 500 500 TLV2262AI MIN TYP 400 MAX 500 500 UNIT A A
TLV2262I operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER TEST CONDITIONS RL = 50 k, TA 25C Full range 25C 25C 25C 25C 25C VO = 0.5 V to 2.5 V, f = 20 kHz, RL = 50 k f = 50 kHz, CL = 100 pF VO(PP) = 2 V, RL = 50 k, AV = - 1, Step = 0.5 V to 2.5 V, RL = 50 k, CL = 100 pF RL = 50 k, AV = 1 25C AV = 10 RL = 50 k, AV = 1, CL = 100 pF To 0.1% 25C To 0.01% 25C 25C 14.1 56 11 14.1 56 11 dB 25C 25C 0.03% 0.71 185 6.4 0.03% 0.71 185 6.4 s s MHz kHz TLV2262I MIN 0.35 0.3 40 12 0.7 1.3 0.6 0.017% TYP 0.55 MAX MIN 0.35 0.3 40 12 0.7 1.3 0.6 0.017% V V nV/Hz TLV2262AI TYP 0.55 V/s MAX UNIT
SR
Slew rate at unity gain Equivalent input noise voltage Peak-to-peak equivalent input noise voltage Equivalent input noise current Total harmonic distortion plus noise Gain-bandwidth product
VO = 1.5 V to 3.5 V, CL = 100 pF f = 10 Hz f = 1 kHz f = 0.1 Hz to 1 Hz f = 0.1 Hz to 10 Hz
Vn
VN(PP) In
fA /Hz
THD + N
BOM
Maximum outputswing bandwidth
ts
Settling time
m
Phase margin at unity gain
CL = 100 pF
Gain margin Full range is - 40C to 125C. Referenced to 2.5 V
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SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
TLV2264I electrical characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted)
PARAMETER VIO VIO Input offset voltage Temperature coefficient of input offset voltage Input offset voltage long-term drift (see Note 4) IIO Input offset current VDD = 1.5 V, VIC = 0, VO = 0, RS= 50 TEST CONDITIONS TA 25C Full range 25 C 25C to 85C 25C 25C 85C Full range 25C IIB Input bias current 85C Full range 25C 25 C VICR Common-mode input voltage range RS = 50 , |VIO | 5 mV Full range IOH = - 20 A VOH High-level output voltage IOH = - 100 A IOH = - 400 A VIC = 1.5 V, VOL Low-level output voltage VIC = 1.5 V, VIC = 1.5 V, Large-signal differential voltage amplification Differential input resistance Common-mode input resistance Common-mode input capacitance Closed-loop output impedance Common-mode rejection ratio Supply voltage rejection ratio ( VDD /VIO) (V /V f = 10 kHz, f = 100 kHz, N package AV = 10 VIC = 1.5 V, VO = 1 to 2 V IOL = 50 A IOL = 500 A IOL = 1 mA RL = 50 k RL = 1 M 25C 25C Full range 25C Full range 25C 25C Full range 25C Full range 25C Full range 25C 25C 25C 25C 25C 25C Full range 25C Full range 65 60 80 80 95 60 30 100 1012 1012 8 270 75 65 60 80 80 100 100 200 300 60 30 100 1012 1012 8 270 77 pF dB dB 100 V/mV 2.85 2.825 2.7 2.65 10 100 150 200 300 0 to 2 0 to 1.7 -0.3 to 2.2 1 2 0.003 0.5 60 150 800 60 150 800 0 to 2 0 to 1.7 2.85 2.825 2.7 2.65 10 100 150 mV V -0.3 to 2.2 1 TLV2264I MIN TYP 300 MAX 2500 3000 2 0.003 0.5 60 150 800 60 150 800 pA pA TLV2264AI MIN TYP 300 MAX 950 1500 UNIT V V/C V/mo
V
2.99
2.99
AVD
ri(d) ri(c) ci(c) zo CMRR kSVR
VIC = 0 to 1.7 V, RS = 50 VO = 1.5 V, VDD = 2.7 V to 8 V, VIC = VDD /2, No load
Full range is - 40C to 125C. Referenced to 1.5 V NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
10
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SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV2264I electrical characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted) (continued)
PARAMETER IDD Supply current (four amplifiers) TEST CONDITIONS VO = 1.5 V, No load TA 25C Full range TLV2264I MIN TYP 0.8 MAX 1 1 TLV2264AI MIN TYP 0.8 MAX 1 1 UNIT mA
Full range is - 40C to 125C.
TLV2264I operating characteristics at specified free-air temperature, VDD = 3 V
PARAMETER Slew rate at unity gain Equivalent input noise voltage Peak-to-peak equivalent input noise voltage Equivalent input noise current Total harmonic distortion plus noise Gain-bandwidth product BOM Maximum output-swing bandwidth VO = 0.5 V to 2.5 V, f = 20 kHz, RL = 50 k f = 1 kHz, CL = 100 pF VO(PP) = 1 V, RL = 50 k , AV = -1, Step = 1 V to 2 V, RL = 50 k , CL = 100 pF RL = 50 k, AV = 1 25C AV = 10 RL = 50 k , AV = 1, CL = 100 pF To 0.1% 25C To 0.01% 25C 25C 12.5 55 11 12.5 55 11 dB 25C 0.05% 0.67 0.05% 0.67 MHz TEST CONDITIONS VO = 0.7 V to 1.7 V, CL = 100 pF f = 10 Hz f = 1 kHz f = 0.1 Hz to 1 Hz f = 0.1 Hz to 10 Hz RL = 50 k, TA 25C Full range 25C 25C 25C 25C 25C TLV2264I MIN 0.35 0.3 43 12 0.6 1 0.6 0.03% TYP 0.55 MAX MIN 0.35 0.3 43 12 0.6 1 0.6 0.03% V V nV/Hz TLV2264AI TYP 0.55 V/s MAX UNIT
SR
Vn
VN(PP) In
fA /Hz
THD + N
25C
395
395
kHz
5.6
5.6 s s
ts
Settling time
m
Phase margin at unity gain
CL = 100 pF
Gain margin Full range is - 40C to 125C. Referenced to 1.5 V
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SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
TLV2264I electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)
PARAMETER VIO VIO Input offset voltage Temperature coefficient of input offset voltage Input offset voltage long-term drift (see Note 4) Input offset current TEST CONDITIONS TA 25C Full range 25 C 25C to 85C VDD = 2.5 V, VIC = 0, VO = 0, RS = 50 25C 25C 85C Full range 25C IIB Input bias current 85C Full range 25 C 25C VICR Common-mode input voltage range |VIO | 5 mV, RS = 50 Full range IOH = - 20 A VOH High-level output voltage IOH = - 100 A IOH = - 400 A VIC = 2.5 V, VOL Low-level output voltage VIC = 2.5 V, VIC = 2.5 V, Large-signal differential voltage amplification Differential input resistance Common-mode input resistance Common-mode input capacitance Closed-loop output impedance Common-mode rejection ratio Supply voltage rejection ratio (VDD /VIO) f = 10 kHz, f = 100 kHz, N package AV = 10 IOL = 50 A IOL = 500 A IOL = 1 mA 25C 25C Full range 25C Full range 25C 25C Full range 25C Full range 25C Full range 25C 25C 25C 25C 25C 25C Full range 25C Full range 70 70 80 80 95 80 55 550 1012 1012 8 240 83 70 70 80 80 95 170 0.2 4.85 4.82 4.7 4.6 0.01 0.09 0.15 0.15 0.3 0.3 80 55 550 1012 1012 8 240 83 pF dB dB 170 V/mV 0.2 4.85 0 to 4 0 to 3.5 4.99 4.94 4.85 4.82 4.7 4.6 0.01 0.09 0.15 0.15 0.3 0.3 V 4.85 -0.3 to 4.2 1 2 TLV2264I MIN TYP 300 MAX 2500 3000 2 TLV2264AI MIN TYP 300 MAX 950 1500 UNIT V V/C V/mo 60 150 800 1 60 150 800 0 to 4 0 to 3.5 4.99 4.94 V -0.3 to 4.2 pA pA
0.003 0.5 60 150 800 60 150 800
0.003 0.5
IIO
V
AVD
RL = 50 k VIC = 2.5 V, VO = 1 V to 4 V RL = 1 M
ri(d) ri(c) ci(c) zo CMRR kSVR
VIC = 0 to 2.7 V, VO = 2.5 V, RS = 50 VDD = 4.4 V to 8 V, VIC = VDD /2, No load
Full range is - 40C to 125C. Referenced to 2.5 V NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
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SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV2264I electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) (continued)
PARAMETER IDD Supply current (four amplifiers) TEST CONDITIONS VO = 2.5 V, No load TA 25C Full range TLV2264I MIN TYP 0.8 MAX 1 1 TLV2264AI MIN TYP 0.8 MAX 1 1 UNIT mA
Full range is - 40C to 125C.
TLV2264I operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER Slew rate at unity gain Equivalent input noise voltage Peak-to-peak equivalent input noise voltage Equivalent input noise current Total harmonic distortion plus noise Gain-bandwidth product BOM Maximum outputswing bandwidth VO = 0.5 V to 2.5 V, f = 20 kHz, RL = 50 k f = 50 kHz, CL = 100 pF VO(PP) = 2 V, RL = 50 k , AV = - 1, Step = 0.5 V to 2.5 V, RL = 50 k , CL = 100 pF RL = 50 k , AV = 1 25C AV = 10 RL = 50 k , AV = 1, CL = 100 pF To 0.1% 25C To 0.01% 25C 25C 14.1 56 11 14.1 56 11 dB 25C 25C 0.03% 0.71 185 6.4 0.03% 0.71 185 6.4 s s MHz kHz TEST CONDITIONS VO = 1.4 V to 2.6 V, CL = 100 pF f = 10 Hz f = 1 kHz f = 0.1 Hz to 1 Hz f = 0.1 Hz to 10 Hz RL = 50 k , TA 25C Full range 25C 25C 25C 25C 25C TLV2264I MIN 0.35 0.3 40 12 0.7 1.3 0.6 0.017% TYP 0.55 MAX MIN 0.35 0.3 40 12 0.7 1.3 0.6 0.017% V V nV/Hz TLV2264AI TYP 0.55 V/s MAX UNIT
SR
Vn
VN(PP) In
fA /Hz
THD + N
ts
Settling time
m
Phase margin at unity gain
CL = 100 pF
Gain margin Full range is - 40C to 125C. Referenced to 2.5 V
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SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
TLV2262Q and TLV2262M electrical characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA 25C Full range 25 C 25C to 125C VDD = 1.5 V, VIC = 0, VO = 0, RS = 50 25C 25C 125C 25C 125C 25C 25 C VICR Common-mode input voltage range RS = 50 , |VIO | 5 mV Full range IOH = - 20 A VOH High-level output voltage IOH = - 100 A IOH = - 400 A VIC = 1.5 V, VOL Low-level output voltage VIC = 1.5 V, VIC = 1.5 V, Large-signal differential voltage amplification Differential input resistance Common-mode input resistance Common-mode input capacitance Closed-loop output impedance Common-mode rejection ratio Supply voltage rejection ratio ( VDD /VIO) (V /V f = 10 kHz, f = 100 kHz, P package AV = 10 IOL = 50 A IOL = 500 A IOL = 1 mA 25C 25C Full range 25C Full range 25C 25C Full range 25C Full range 25C Full range 25C 25C 25C 25C 25C 25C Full range 25C Full range 65 60 80 80 95 60 25 100 1012 1012 8 270 75 65 60 80 80 100 100 200 2.85 2.82 2.7 2.55 10 100 150 165 300 300 60 25 100 1012 1012 8 270 77 pF dB dB 100 V/mV 200 0 to 2 0 to 1.7 -0.3 to 2.2 1 2 0.003 0.5 60 800 60 800 0 to 2 0 to 1.7 2.85 2.82 2.7 2.55 10 100 150 165 300 300 mV V -0.3 to 2.2 1 TLV2262Q, TLV2262M MIN VIO VIO Input offset voltage Temperature coefficient of input offset voltage Input offset voltage long-term drift (see Note 4) IIO IIB Input offset current Input bias current TYP 300 MAX 2500 3000 2 0.003 0.5 60 800 60 800 TLV2262AQ, TLV2262AM MIN TYP 300 MAX 950 1500 V V/C V/mo UNIT
pA pA
V
2.99
2.99
AVD
RL = 50 k VIC = 1.5 V, VO = 1 V to 2 V RL = 1 M
ri(d) ri(c) ci(c) zo CMRR kSVR
VIC = 0 to 1.7 V, VO = 1.5 V, RS = 50 VDD = 2.7 V to 8 V, VIC = VDD /2, No load
Full range is - 40C to 125C for Q level part, - 55C to 125C for M level part. Referenced to 1.5 V NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
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SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV2262Q and TLV2262M electrical characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted) (continued)
PARAMETER TEST CONDITIONS TA 25C Full range TLV2262Q, TLV2262M MIN IDD Supply current VO = 1.5 V, No load TYP 400 MAX 500 500 TLV2262AQ, TLV2262AM MIN TYP 400 MAX 500 500 A UNIT
Full range is - 40C to 125C for Q level part, - 55C to 125C for M level part.
TLV2262Q and TLV2262M operating characteristics at specified free-air temperature, VDD = 3 V
PARAMETER TEST CONDITIONS TA MIN SR Slew rate at unity gain VO = 0.5 V to 1.7 V, CL = 100 pF f = 10 Hz f = 1 kHz f = 0.1 Hz to 1 Hz f = 0.1 Hz to 10 Hz RL = 50 k, 25C Full range 25C 25C 25C 25C 25C VO = 0.5 V to 2.5 V, f = 20 kHz, RL = 50 k f = 1 kHz, CL = 100 pF VO(PP) = 1 V, RL = 50 k, AV = - 1, Step = 1 V to 2 V, RL = 50 k, CL = 100 pF RL = 50 k, AV = 1 25C AV = 10 RL = 50 k, AV = 1, CL = 100 pF To 0.1% 25C To 0.01% 25C 12.5 55 11 12.5 55 11 dB 25C 0.05% 0.67 0.05% 0.67 MHz 0.35 0.25 43 12 0.6 1 0.6 0.03% TLV2262Q, TLV2262M TYP 0.55 MAX TLV2262AQ, TLV2262AM MIN 0.35 0.25 43 12 0.6 1 0.6 0.03% V V nV/Hz TYP 0.55 V/s MAX UNIT
Vn
Equivalent input noise voltage Peak-to-peak equivalent input noise voltage Equivalent input noise current Total harmonic distortion plus noise Gain-bandwidth product
VN(PP) In
fA /Hz
THD + N
BOM
Maximum output-swing bandwidth
25C
395
395
kHz
5.6
5.6 s s
ts
Settling time
m
Phase margin at unity gain
CL = 100 pF
Gain margin 25C Full range is - 40C to 125C for Q level part, - 55C to 125C for M level part. Referenced to 1.5 V
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SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
TLV2262Q and TLV2262M electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA 25C Full range 25 C 25C to 125C VDD = 2.5 V, VIC = 0, VO = 0, RS = 50 25C 25C 125C 25C 125C 25C 25 C VICR Common-mode input voltage range |VIO | 5 mV, RS = 50 Full range IOH = - 20 A VOH High-level output voltage IOH = - 100 A IOH = - 400 A VIC = 2.5 V, VOL Low-level output voltage VIC = 2.5 V, VIC = 2.5 V, Large-signal differential voltage amplification Differential input resistance Common-mode input resistance Common-mode input capacitance Closed-loop output impedance Common-mode rejection ratio Supply voltage rejection ratio (VDD /VIO) f = 10 kHz, f = 100 kHz, P package AV = 10 IOL = 50 A IOL = 500 A IOL = 1 mA 25C 25C Full range 25C Full range 25C 25C Full range 25C Full range 25C Full range 25C 25C 25C 25C 25C 25C Full range 25C Full range 70 70 80 80 95 80 50 550 1012 1012 8 240 83 70 70 80 80 95 170 0.2 4.85 4.82 4.7 4.5 0.01 0.09 0.15 0.15 0.3 0.3 80 50 550 1012 1012 8 240 83 170 V/mV pF dB dB 0.2 4.85 0 to 4 0 to 3.5 4.99 4.94 4.85 4.82 4.7 4.5 0.01 0.09 0.15 0.15 0.3 0.3 V 4.85 -0.3 to 4.2 1 2 0.003 0.5 60 800 60 800 0 to 4 0 to 3.5 4.99 4.94 V -0.3 to 4.2 1 TLV2262Q, TLV2262M MIN VIO VIO Input offset voltage Temperature coefficient of input offset voltage Input offset voltage long-term drift (see Note 4) IIO IIB Input offset current Input bias current TYP 300 MAX 2500 3000 2 0.003 0.5 60 800 60 800 TLV2262AQ, TLV2262AM MIN TYP 300 MAX 950 1500 V V/C V/mo pA pA UNIT
V
AVD ri(d) ri(c) ci(c) zo CMRR kSVR
RL = 50 k VIC = 2.5 V, VO = 1 V to 4 V RL = 1 M
VIC = 0 to 2.7 V, VO = 2.5 V, RS = 50 VDD = 4.4 V to 8 V, VIC = VDD /2, No load
Full range is - 40C to 125C for Q level part, - 55C to 125C for M level part. Referenced to 2.5 V NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
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SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV2262Q and TLV2262M electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) (continued)
PARAMETER TEST CONDITIONS TA 25C Full range TLV2262Q, TLV2262M MIN IDD Supply current VO = 2.5 V, No load TYP 400 MAX 500 500 TLV2262AQ, TLV2262AM MIN TYP 400 MAX 500 500 A UNIT
Full range is - 40C to 125C for Q level part, - 55C to 125C for M level part.
TLV2262Q and TLV2262M operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER TEST CONDITIONS TA MIN SR Slew rate at unity gain Equivalent input noise voltage Peak-to-peak equivalent input noise voltage Equivalent input noise current Total harmonic distortion plus noise Gain-bandwidth product BOM Maximum output-swing bandwidth VO = 0.5 V to 2.5 V, f = 20 kHz, RL = 50 k f = 50 kHz, CL = 100 pF VO(PP) = 2 V, RL = 50 k, AV = - 1, Step = 0.5 V to 2.5 V, RL = 50 k, CL = 100 pF RL = 50 k, AV = 1 25C AV = 10 RL = 50 k, AV = 1, CL = 100 pF To 0.1% 25C To 0.01% 25C 14.1 56 11 14.1 56 11 dB 25C 0.03% 0.71 0.03% 0.71 MHz VO = 0.5 V to 3.5 V, CL = 100 pF f = 10 Hz f = 1 kHz f = 0.1 Hz to 1 Hz f = 0.1 Hz to 10 Hz RL = 50 k 25C Full range 25C 25C 25C 25C 25C 0.35 0.25 40 12 0.7 1.3 0.6 0.017% TLV2262Q, TLV2262M TYP 0.55 MAX MIN 0.35 0.25 40 12 0.7 1.3 0.6 0.017% V V nV/Hz TLV2262AQ, TLV2262AM TYP 0.55 V/s MAX UNIT
Vn
VN(PP) In
fA /Hz
THD + N
25C
185
185
kHz
6.4
6.4 s s
ts
Settling time
m
Phase margin at unity gain
CL = 100 pF
Gain margin 25C Full range is - 40C to 125C for Q level part, - 55C to 125C for M level part. Referenced to 2.5 V
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SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
TLV2264Q and TLV2264M electrical characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA 25C Full range 25 C 25C to 125C VDD = 1.5 V, VIC = 0, VO = 0, RS = 50 25C 25C 125C 25C 125C 25C 25 C VICR Common-mode input voltage range RS = 50 , |VIO | 5 mV Full range IOH = - 20 A VOH High-level output voltage IOH = - 100 A IOH = - 400 A VIC = 1.5 V, VOL Low-level output voltage VIC = 1.5 V, VIC = 1.5 V, Large-signal differential voltage amplification Differential input resistance Common-mode input resistance Common-mode input capacitance Closed-loop output impedance Common-mode rejection ratio Supply voltage rejection ratio ( VDD /VIO) /V (V f = 10 kHz, f = 100 kHz, N package AV = 10 IOL = 50 A IOL = 500 A IOL = 1 mA 25C 25C Full range 25C Full range 25C 25C Full range 25C Full range 25C Full range 25C 25C 25C 25C 25C 25C Full range 65 60 60 25 100 1012 1012 8 270 75 65 60 100 200 2.85 2.82 2.7 2.6 10 100 150 150 300 300 60 25 100 1012 1012 8 270 77 pF dB 100 V/mV 200 0 to 2 0 to 1.7 -0.3 to 2.2 1 2 0.003 0.5 60 800 60 800 0 to 2 0 to 1.7 2.85 2.82 2.7 2.6 10 100 150 150 300 300 mV V -0.3 to 2.2 1 TLV2264Q, TLV2264M MIN VIO VIO Input offset voltage Temperature coefficient of input offset voltage Input offset voltage long-term drift (see Note 4) IIO IIB Input offset current Input bias current TYP 300 MAX 2500 3000 2 0.003 0.5 60 800 60 800 TLV2264AQ, TLV2264AM MIN TYP 300 MAX 950 1500 V V/C V/mo UNIT
pA pA
V
2.99
2.99
AVD
RL = 50 k VIC = 1.5 V, VO = 1 V to 2 V RL = 1 M
ri(d) ri(c) ci(c) zo CMRR kSVR
25C 80 95 80 100 dB VIC = VDD /2, No load Full range 80 80 Full range is - 40C to 125C for Q level part, - 55C to 125C for M level part. Referenced to 1.5 V NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
VIC = 0 to 1.7 V, VO = 1.5 V, RS = 50 VDD = 2.7 V to 8 V,
18
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SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV2264Q and TLV2264M electrical characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted) (continued)
PARAMETER Supply current (four amplifiers) TEST CONDITIONS TA 25C Full range TLV2264Q, TLV2264M MIN IDD VO = 1.5 V, No load TYP 0.8 MAX 1 1 TLV2264AQ, TLV2264AM MIN TYP 0.8 MAX 1 1 mA UNIT
Full range is - 40C to 125C for Q level part, - 55C to 125C for M level part.
TLV2264Q and TLV2264M operating characteristics at specified free-air temperature, VDD = 3 V
PARAMETER TEST CONDITIONS TA MIN SR Slew rate at unity gain Equivalent input noise voltage Peak-to-peak equivalent input noise voltage Equivalent input noise current Total harmonic distortion plus noise Gain-bandwidth product BOM Maximum outputswing bandwidth VO = 0.5 V to 2.5 V, f = 20 kHz, RL = 50 k f = 1 kHz, CL = 100 pF VO(PP) = 1 V, RL = 50 k, AV = - 1, Step = 1 V to 2 V, RL = 50 k , CL = 100 pF RL = 50 k, AV = 1 25C AV = 10 RL = 50 k , AV = 1, CL = 100 pF To 0.1% 25C To 0.01% 25C 12.5 55 11 12.5 55 11 dB 25C 25C 0.05% 0.67 395 5.6 0.05% 0.67 395 5.6 s s MHz kHz VO = 0.5 V to 1.7 V, CL = 100 pF f = 10 Hz f = 1 kHz f = 0.1 Hz to 1 Hz f = 0.1 Hz to 10 Hz RL = 50 k, 25C Full range 25C 25C 25C 25C 25C 0.35 0.25 43 12 0.6 1 0.6 0.03% TLV2264Q, TLV2264M TYP 0.55 MAX TLV2264AQ, TLV2264AM MIN 0.35 0.25 43 12 0.6 1 0.6 0.03% V V nV/Hz TYP 0.55 V/s MAX UNIT
Vn
VN(PP) In
fA /Hz
THD + N
ts
Settling time
m
Phase margin at unity gain
CL = 100 pF
Gain margin 25C Full range is - 40C to 125C for Q level part, - 55C to 125C for M level part. Referenced to 1.5 V
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SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
TLV2264Q and TLV2264M electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA 25C Full range 25 C 25C to 125C 25C 25C 125C 25C 125C 25 C 25C VICR Common-mode input voltage range |VIO | 5 mV, RS = 50 Full range IOH = - 20 A VOH High-level output voltage IOH = - 100 A IOH = - 400 A VIC = 2.5 V, VOL Low-level output voltage VIC = 2.5 V, VIC = 2.5 V, Large-signal differential voltage amplification Differential input resistance Common-mode input resistance Common-mode input capacitance Closed-loop output impedance Common-mode rejection ratio Supply voltage rejection ratio (VDD /VIO) f = 10 kHz, f = 100 kHz, N package AV = 10 IOL = 50 A IOL = 500 A IOL = 1 mA 25C 25C Full range 25C Full range 25C 25C Full range 25C Full range 25C Full range 25C 25C 25C 25C 25C 25C Full range 25C Full range 70 70 80 80 95 80 50 550 1012 1012 8 240 83 70 70 80 80 95 170 0.2 4.85 4.82 4.7 4.5 0.01 0.09 0.15 0.15 0.3 0.3 80 50 550 1012 1012 8 240 83 pF dB dB 170 V/mV 0.2 4.85 0 to 4 0 to 3.5 4.99 4.94 4.85 4.82 4.7 4.5 0.01 0.09 0.15 0.15 0.3 0.3 V 4.85 -0.3 to 4.2 1 2 TLV2264Q, TLV2264M MIN VIO VIO Input offset voltage Temperature coefficient of input offset voltage Input offset voltage long-term drift (see Note 4) Input offset current Input bias current TYP 300 MAX 2500 3000 2 TLV2264AQ, TLV2264AM MIN TYP 300 MAX 950 1500 V V/C V/mo 60 800 1 0 to 4 0 to 3.5 4.99 4.94 V -0.3 to 4.2 60 800 UNIT
VDD = 2.5 V, VIC = 0, VO = 0, RS = 50
0.003 0.5 60 800 60 800
0.003 0.5
IIO IIB
pA pA
V
AVD
RL = 50 k VIC = 2.5 V, VO = 1 V to 4 V RL = 1 M
ri(d) ri(c) ci(c) zo CMRR kSVR
VIC = 0 to 2.7 V, VO = 2.5 V, RS = 50 VDD = 4.4 V to 8 V, VIC = VDD /2, No load
Full range is - 40C to 125C for Q level part, - 55C to 125C for M level part. Referenced to 2.5 V NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
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SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV2264Q and TLV2264M electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) (continued)
PARAMETER Supply current (four amplifiers) TEST CONDITIONS TA 25C Full range TLV2264Q, TLV2264M MIN IDD VO = 2.5 V, No load TYP 0.8 MAX 1 1 TLV2264AQ, TLV2264AM MIN TYP 0.8 MAX 1 1 mA UNIT
Full range is - 40C to 125C for Q level part, - 55C to 125C for M level part.
TLV2264Q and TLV2264M operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER TEST CONDITIONS TA MIN SR Slew rate at unity gain Equivalent input noise voltage Peak-to-peak equivalent input noise voltage Equivalent input noise current Total harmonic distortion plus noise Gain-bandwidth product BOM Maximum output-swing bandwidth VO = 0.5 V to 2.5 V, f = 20 kHz, RL = 50 k f = 50 kHz, CL = 100 pF VO(PP) = 2 V, RL = 50 k , AV = - 1, Step = 0.5 V to 2.5 V, RL = 50 k , CL = 100 pF RL = 50 k , AV = 1 25C AV = 10 RL = 50 k , AV = 1, CL = 100 pF To 0.1% 25C To 0.01% 25C 14.1 56 11 14.1 56 11 dB 25C 0.03% 0.71 0.03% 0.71 MHz VO = 0.5 V to 3.5 V, CL = 100 pF f = 10 Hz f = 1 kHz f = 0.1 Hz to 1 Hz f = 0.1 Hz to 10 Hz RL = 50 k , 25C Full range 25C 25C 25C 25C 25C 0.35 0.25 40 12 0.7 1.3 0.6 0.017% TLV2264Q, TLV2264M TYP 0.55 MAX TLV2264AQ, TLV2264AM MIN 0.35 0.25 40 12 0.7 1.3 0.6 0.017% V V nV/Hz TYP 0.55 V/s MAX UNIT
Vn
VN(PP) In
fA /Hz
THD + N
25C
185
185
kHz
6.4
6.4 s s
ts
Settling time
m
Phase margin at unity gain
CL = 100 pF
Gain margin 25C Full range is - 40C to 125C for Q level part, - 55C to 125C for M level part. Referenced to 2.5 V
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SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE VIO VIO IIB/IIO VI VOH VOL VO(PP) IOS VID AVD AVD zo CMRR kSVR IDD SR VO VO VO VO Vn Input offset voltage Input offset voltage temperature coefficient Input bias and input offset currents Input voltage High-level output voltage Low-level output voltage Maximum peak-to-peak output voltage Short-circuit output current Differential input voltage Differential voltage amplification Large-signal differential voltage amplification Output impedance Common-mode rejection ratio Supply-voltage rejection ratio Supply current Slew rate Inverting large-signal pulse response Voltage-follower large-signal pulse response Inverting small-signal pulse response Voltage-follower small-signal pulse response Equivalent input noise voltage Input noise voltage Integrated noise voltage THD + N Total harmonic distortion plus noise Gain-bandwidth product m Phase margin Gain margin B1 Unity-gain bandwidth Overestimation of phase margin vs Frequency Over a 10-second period vs Frequency vs Frequency vs Supply voltage vs Free-air temperature vs Frequency vs Load capacitance vs Load capacitance vs Load capacitance vs Load capacitance Distribution vs Common-mode voltage Distribution vs Free-air temperature vs Supply voltage vs Free-air temperature vs High-level output current vs Low-level output current vs Frequency vs Supply voltage vs Free-air temperature vs Output voltage vs Load resistance vs Frequency vs Free-air temperature vs Frequency vs Frequency vs Free-air temperature vs Frequency vs Free-air temperature vs Free-air temperature vs Load capacitance vs Free-air temperature 2-5 6, 7 8 - 11 12 13 14 15, 18 16, 17, 19 20 21 22 23, 24 25 26, 27 28, 29 30, 31 32 33 34, 35 36, 37 38, 39 40 41 42, 43 44, 45 46, 47 48, 49 50, 51 52 53 54 55 56 26, 27 57 58 59 60
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SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TLV2262 INPUT OFFSET VOLTAGE
15 841 Amplifiers From 2 Wafer Lots VDD = 1.5 V TA = 25C Precentage of Amplifiers - % 15 841 Amplifiers From 2 Wafer Lots VDD = 2.5 V TA = 25C
DISTRIBUTION OF TLV2262 INPUT OFFSET VOLTAGE
Precentage of Amplifiers - %
12
12
9
9
6
6
3
3
0 -1.6
-0.8 0 0.8 VIO - Input Offset Voltage - mV
1.6
0 -1.6
-0.8 0 0.8 VIO - Input Offset Voltage - mV
1.6
Figure 2
DISTRIBUTION OF TLV2264 INPUT OFFSET VOLTAGE
20 2272 Amplifiers From 2 Wafer Lots VDD = 1.5 V TA = 25C Percentage of Amplifiers - % 20
Figure 3
DISTRIBUTION OF TLV2264 INPUT OFFSET VOLTAGE
2272 Amplifiers From 2 Wafer Lots VDD = 2.5 V TA = 25C
Percentage of Amplifiers - %
16
16
12
12
8
8
4
4
0 -1.6
-0.8 0 0.8 VIO - Input Offset Voltage - mV
1.6
0 -1.6
-0.8 0 0.8 VIO - Input Offset Voltage - mV
1.6
Figure 4
Figure 5
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SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
TYPICAL CHARACTERISTICS
INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE
1 VDD = 3 V RS = 50 TA = 25C VIO - Input Offset Voltage - mV 0.5 VIO - Input Offset Voltage - mV 1 VDD = 5 V RS = 50 TA = 25C 0.5
INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE
0
0
-0.5
-1 -1
-0.5
0
0.5
1
1.5
2
2.5
3
VIC - Common-Mode Input Voltage - V
Figure 6
DISTRIBUTION OF TLV2262 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT
30 128 Amplifiers From 2 Wafer Lots VDD = 1.5 V 25 P Package TA = 25C to 85C 20 30
Percentage of Amplifiers - %
Percentage of Amplifiers - %
15
10
5
0 -5
-4 -3 -2 -1 0 1 2 3 4 VIO - Temperature Coefficient - V / C
5
Figure 8
For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V.
24
POST OFFICE BOX 655303
AA AA
-0.5
AA AA
-1 -1
0
1
2
3
4
5
VIC - Common-Mode Input Voltage - V
Figure 7
DISTRIBUTION OF TLV2262 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT
128 Amplifiers From 2 Wafer Lots VDD = 2.5 V 25 P Package TA = 25C to 85C 20
15
10
5
0 -5
-4 -3 -2 -1 0 1 2 3 4 VIO - Temperature Coefficient - V / C
5
Figure 9
* DALLAS, TEXAS 75265
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TLV2264 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT
35 128 Amplifiers From 2 Wafer Lots 30 VDD = 1.5 V N Package TA = 25C to 125C 25 20 15 10 35 30 Percentage of Amplifiers - % 25 20 15 10
DISTRIBUTION OF TLV2264 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT
128 Amplifiers From 2 Wafer Lots VDD = 2.5 V N Package TA = 25C to 125C
Percentage of Amplifiers - %
5 0 -5 -4 -3 -2 -1 0 1 2 3 4 5 VIO - Temperature Coefficient of Input Offset Voltage - V / C
5 0 -5 -4 -3 -2 -1 0 1 2 3 VIO - Temperature Coefficient of Input Offset Voltage - V / C 4 5
Figure 10
INPUT BIAS AND INPUT OFFSET CURRENTS vs FREE-AIR TEMPERATURE
35 30 25 IIB 20 15 IIO 10 VDD = 2.5 V VIC = 0 VO = 0 RS = 50 VI - Input Voltage - V 2.5 2 1.5 1 0.5 0 -0.5 -1 RS = 50 TA = 25C
Figure 11
INPUT VOLTAGE vs SUPPLY VOLTAGE
IIO IIIB and IIO - Input Bias and Input Offset Currents - pA IB
| VIO | 5 mV
5 0 25 45 65 85 105 TA - Free-Air Temperature - C 125
Figure 12
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
AA AA
-1.5 -2
-2.5 1
AA AA
1.5
2 2.5 3 3.5 | VDD | - Supply Voltage - V
4
Figure 13
25
SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
TYPICAL CHARACTERISTICS
INPUT VOLTAGE vs FREE-AIR TEMPERATURE
5 VDD = 5 V 4 VOH - High-Level Output Voltage - V 3.5 3 2.5 TA = 125C 2 TA = 25C 1.5 1 0.5 0 TA = 85C TA = - 40C TA = - 55C 4 VDD = 3 V
HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT
VI - Input Voltage - V
3
2
| VIO | 5 mV
1
0
-1 -55 -35 -15 5 25 45 65 85 105 125 TA - Free-Air Temperature - C
Figure 14
LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT
1.2 VDD = 3 V TA = 25C VOL - Low-Level Output Voltage - V 1.4 1.2 1 VDD = 3 V VIC = 1.5 V
VOL - Low-Level Output Voltage - V
1 VIC = 0 0.8 VIC = 0.75 V 0.6 VIC = 1.5 V
0.4
0.2
0 0 1 2 3 4 5 IOL - Low-Level Output Current - mA
Figure 16
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V.
26
POST OFFICE BOX 655303
AA AA AA AA AA AA
AA AA AA
0
500
1000
1500
2000
| IOH | - High-Level Output Current - A
Figure 15
LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT
TA = 125C TA = 85C 0.8 TA = 25C 0.6 TA = - 55C 0.4 TA = - 40C 0.2 0 0 1 2 3 4 IOL - Low-Level Output Current - mA 5
Figure 17
* DALLAS, TEXAS 75265
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TYPICAL CHARACTERISTICS
HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT
6 VDD = 5 V VOH - High-Level Output Voltage - V 5 TA = - 55C 4 TA = - 40C 3 TA = 25C TA = 125C TA = 85C 1 VOL - Low-Level Output Voltage - V 1.2 1 TA = 85C 0.8 TA = 25C 0.6 TA = 125C 0.4 0.2 0 0 4 5 1 2 3 IOL - Low-Level Output Current - mA 6 TA = - 40C TA = - 55C 1.4 VDD = 5 V VIC = 2.5 V
LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT
2
0
0
500
1000
1500
2000
2500
3000
| IOH | - High-Level Output Current - A
Figure 18
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs FREQUENCY
VO(PP) - Maximum Peak-to-Peak Output Voltage - V 5 VDD = 5 V 4 I OS - Short-Circuit Output Current - mA RI = 10 k TA = 25C 12 10 8 6 VIC = VDD/2 TA = 25C
3 VDD = 3 V 2
1
0 10 3
10 4 10 5 f - Frequency - Hz
10 6
Figure 20
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
AA AA
AA AA AA AA AA
Figure 19
SHORT-CIRCUIT OUTPUT CURRENT vs SUPPLY VOLTAGE
VID = - 100 mV
4 2 0 VID = 100 mV -2 2 3 4 5 6 VDD - Supply Voltage - V 7 8
Figure 21
27
SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
TYPICAL CHARACTERISTICS
SHORT-CIRCUIT OUTPUT CURRENT vs FREE-AIR TEMPERATURE
12 I OS - Short-Circuit Output Current - mA 10 VID = - 100 mV 8 6 4 2 0 VID = 100 mV -2 -4 -75 VO = 2.5 V VDD = 5 V V ID - Differential Input Voltage - V 1000 800 600 400 200 0 -200 -400 -600 -800 -1000 VDD = 3 V RI = 50 k VIC = 1.5 V TA = 25C
DIFFERENTIAL INPUT VOLTAGE vs OUTPUT VOLTAGE
-50
-25 0 25 50 75 100 TA - Free-Air Temperature - C
125
0
0.5
1 1.5 2 VO - Output Voltage - V
2.5
3
Figure 22
DIFFERENTIAL INPUT VOLTAGE vs OUTPUT VOLTAGE
AVD - Differential Voltage Amplification - V/mV 1000 800 V ID - Differential Input Voltage - V 600 400 200 0 -200 -400 -600 -800 -1000 0 1 2 4 3 VO - Output Voltage - V 5 VDD = 5 V VIC = 2.5 V RL = 50 k TA = 25C 1000
Figure 23
DIFFERENTIAL VOLTAGE AMPLIFICATION vs LOAD RESISTANCE
VO(PP) = 2 V TA = 25C VDD = 5 V 100 VDD = 3 V
10
Figure 24
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V.
28
POST OFFICE BOX 655303
AA AA
1 10 3
10 4
10 5
10 6
RL - Load Resistance - k
Figure 25
* DALLAS, TEXAS 75265
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE MARGIN vs FREQUENCY
80 VDD = 5 V CL= 100 pF TA = 25C 180
AVD AVD - Large-Signal Differential Voltage Amplification - dB
60
135
40 Phase Margin 20 Gain 0
90
45
0
-20
-45
-40 103
104
105 f - Frequency - Hz
106
-90 107
Figure 26
LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE MARGIN vs FREQUENCY
80 VDD = 3 V CL = 100 pF TA = 25C 180
AVD AVD - Large-Signal Differential Voltage Amplification - dB
60
135
40 Phase Margin 20 Gain 0
90
45
0
-20
-45
-40 103 104 105 f - Frequency - Hz 106
-90 107
Figure 27
For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
m - Phase Margin om
m - Phase Margin om
AA AA AA AA AA AA
29
SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREE-AIR TEMPERATURE
1000 RL = 1 M AVD - Large-Signal Differential Voltage Amplification - V/mV AVD - Large-Signal Differential Voltage Amplification - V/mV 10000
LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREE-AIR TEMPERATURE
VDD = 5 V VIC = 2.5 V VO = 1 V to 4 V RL = 1 M
RL = 50 k
1000
100 RL = 10 k
RL = 50 k
100
RL = 10 k
10 -75
VDD = 3 V VIC = 1.5 V VO = 0.5 V to 2.5 V -50 -25 0 25 50 75 100 TA - Free-Air Temperature - C 125
10 -75
-50
-25 0 25 50 75 100 TA - Free-Air Temperature - C
125
Figure 28
OUTPUT IMPEDANCE vs FREQUENCY
1000 VDD = 3 V TA = 25C A V = 100 1000 VDD = 5 V TA = 25C 100 A V = 100
Figure 29
OUTPUT IMPEDANCE vs FREQUENCY
z o - Output Impedance -
10
A V = 10
z o - Output Impedance -
100
10
A V = 10
AV = 1 1
1
AV = 1
0.1 10 2
10 3 10 4 f- Frequency - Hz
10 5
0.1 10 2
10 3 10 4 f- Frequency - Hz
10 5
Figure 30
Figure 31
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V.
30
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TYPICAL CHARACTERISTICS
COMMON-MODE REJECTION RATIO vs FREQUENCY
100 CMRR - Common-Mode Rejection Ratio - dB VDD = 5 V VIC = 2.5 V 80 VDD = 5 V VIC = 1.5 V 60 TA = 25C CMMR - Common-Mode Rejection Ratio - dB 90 88 86 84 82 80 78 VDD = 3 V 76 74 72 70 - 75 - 50 - 25 0 25 50 75 100 TA - Free-Air Temperature - C VDD = 5 V
COMMON-MODE REJECTION RATIO vs FREE-AIR TEMPERATURE
40
20
0 10 1
10 2
10 4 10 3 f - Frequency - Hz
10 5
10 6
125
Figure 32
SUPPLY-VOLTAGE REJECTION RATIO vs FREQUENCY
100 k SVR - Supply-Voltage Rejection Ratio - dB k SVR - Supply-Voltage Rejection Ratio - dB VDD = 3 V TA = 25C 80 100
Figure 33
SUPPLY-VOLTAGE REJECTION RATIO vs FREQUENCY
VDD = 5 V TA = 25C 80
60 kSVR + 40 kSVR - 20
60 kSVR + 40 kSVR - 20
-20 10 1
10 2
10 3 10 4 f - Frequency - Hz
10 5
10 6
Figure 34
For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V. Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
AA AA AA
0
0
AA AA
-20 10 1
10 2
10 3 10 4 f - Frequency - Hz
10 5
10 6
Figure 35
31
SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
TYPICAL CHARACTERISTICS
TLV2262 SUPPLY-VOLTAGE REJECTION RATIO vs FREE-AIR TEMPERATURE
110 k SVR - Supply-Voltage Rejection Ratio - dB VDD = 2.7 V to 8 V VIC = VO = VDD / 2 110 k SVR - Supply-Voltage Rejection Ratio - dB
TLV2264 SUPPLY-VOLTAGE REJECTION RATIO vs FREE-AIR TEMPERATURE
VDD = 2.7 V to 8 V VIC = VO = VDD / 2
105
105
100
100
95
95
90 -75 -50
-25 0 25 50 75 100 TA - Free-Air Temperature - C
125
Figure 36
TLV2262 SUPPLY CURRENT vs FREE-AIR TEMPERATURE
600
I DD - Supply Current - A
500 VDD = 5 V VO = 2.5 V 400 VDD = 3 V VO = 1.5 V 300
I DD - Supply Current - A
200 -75 -50
-25 0 25 50 75 100 TA - Free-Air Temperature - C
125
Figure 38
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V.
32
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
AA AA AA
1200 1000 800
AA AA AA
AA AA AA AA
90 -75
-50
-25 0 25 50 75 100 TA - Free-Air Temperature - C
125
Figure 37
TLV2264 SUPPLY CURRENT vs FREE-AIR TEMPERATURE
VDD = 5 V VO = 2.5 V
VDD = 3 V VO = 1.5 V 600
400 -75
-50
-25 0 25 50 75 100 TA - Free-Air Temperature - C
125
Figure 39
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TYPICAL CHARACTERISTICS
SLEW RATE vs LOAD CAPACITANCE
1 1.2 SR - 0.8 SR - Slew Rate - V/ s SR - SR - Slew Rate - V/ s 0.8 0.6 SR + 1
SLEW RATE vs FREE-AIR TEMPERATURE
0.6
SR + 0.4
0.4 VDD = 5 V RL = 50 k CL = 100 pF AV = 1 -50 -25 0 25 50 75 100 TA - Free-Air Temperature - C 125
0.2 VDD = 5 V AV = -1 TA = 25C 10 2 10 3 CL - Load Capacitance - pF 10 4
0.2
0 10 1
0 -75
Figure 40
INVERTING LARGE-SIGNAL PULSE RESPONSE
3 VDD = 3 V RL = 50 k CL = 100 pF AV = -1 TA = 25C VO - Output Voltage - V 5
Figure 41
INVERTING LARGE-SIGNAL PULSE RESPONSE
VDD = 5 V RL = 50 k CL = 100 pF AV = -1 TA = 25C
2.5 VO - Output Voltage - V
4
2
3
1.5
2
1
0.5
1
0
0
2
4
6
8 10 12 14 t - Time - s
16
18
20
0 0 2 4 6 8 10 12 t - Time - s 14 16 18 20
Figure 42
Figure 43
For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V. Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
33
SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
TYPICAL CHARACTERISTICS
VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE
3 VDD = 3 V RL = 50 k CL = 100 pF AV = -1 TA = 25C 5
VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE
VDD = 5 V RL = 50 k CL = 100 pF AV = -1 TA = 25C
2.5 VO - Output Voltage - V
4 VO - Output Voltage - V 8 10 12 14 16 18 20
2
3
1.5
2
1
0.5
1
0
0
2
4
6
0 0 2 4 6 8 10 12 t - Time - s 14 16 18 20
t - Time - s
Figure 44
INVERTING SMALL-SIGNAL PULSE RESPONSE
0.95 0.9 VO - Output Voltage - V 0.85 0.8 0.75 0.7 VDD = 3 V RL = 50 k CL = 100 pF AV = - 1 TA = 25C 2.65 VDD = 5 V RL = 50 k CL = 100 pF 2.6 A = - 1 V TA = 25C 2.55
Figure 45
INVERTING SMALL-SIGNAL PULSE RESPONSE
VO - Output Voltage - V VO 8 10 12 14 16 18 20
2.5
0.65 0.6 0 2 4 6 t - Time - s
2.45
2.4 0 2 4 6 8 10 12 14 16 18 20 t - Time - s
Figure 46
Figure 47
For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V.
34
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TYPICAL CHARACTERISTICS
VOLTAGE-FOLLOWER SMALL-SIGNAL PULSE RESPONSE
0.95 VDD = 3 V RL = 50 k CL = 100 pF AV = 1 TA = 25C 2.65 VDD = 5 V RL = 50 k CL = 100 pF AV = 1 TA = 25C
VOLTAGE-FOLLOWER SMALL-SIGNAL PULSE RESPONSE
0.9 VO - Output Voltage - V VO
2.6 VO - Output Voltage - V VO 6 8 10 12 t - Time - s 14 16 18 20
0.85
2.55
0.8
2.5
0.75
2.45
0.7 0 2 4
2.4 0 2 4 6 8 10 12 t - Time - s 14 16 18 20
Figure 48
EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY
60 V n - Equivalent Input Noise Voltage - nV/ Hz V n - Equivalent Input Noise Voltage - nV/ Hz VDD = 3 V RS = 20 TA = 25C 60 VDD = 5 V RS = 20 TA = 25C
Figure 49
EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY
50
50
40
40
30
30
20
20
10
10
0 10 1
10 2 10 3 f - Frequency - Hz
10 4
0 10 1
10 2 10 3 f - Frequency - Hz
10 4
Figure 50
Figure 51
For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
35
SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
TYPICAL CHARACTERISTICS
INTEGRATED NOISE VOLTAGE vs FREQUENCY
100 Calculated Using Ideal Pass-Band Filter Lower Frequency = 1 Hz TA = 25C
INPUT NOISE VOLTAGE OVER A 10-SECOND PERIOD
1000 750 500 250 0 -250 -500 -750 -1000 0 VDD = 5 V f = 0.1 Hz to 10 Hz TA = 25C 2 4 6 8 10 t - Time - s Integrated Noise Voltage - V
Input Noise Voltage - nV
10
1
0.1 1
10 1
10 2 10 3 f - Frequency - Hz
10 4
10 5
Figure 52
TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY
THD + N - Total Harmonic Distortion Plus Noise - % 10 -1 900 A V = 100 Gain-Bandwidth Product - kHz 860
Figure 53
GAIN-BANDWIDTH PRODUCT vs SUPPLY VOLTAGE
820
10 -2
A V = 10
780
AV = 1 VDD = 5 V RL = 50 k TA = 25C 10 2 10 3 f - Frequency - Hz 10 4 10 4
740
10 -3 10 1
700 0 1 2 3 5 4 6 VDD - Supply Voltage - V 7 8
Figure 54
Figure 55
For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V.
36
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TYPICAL CHARACTERISTICS
GAIN-BANDWIDTH PRODUCT vs FREE-AIR TEMPERATURE
1200 VDD = 5 V f = 10 kHz CL = 100 pF Gain-Bandwidth Product - kHz 1000 m - Phase Margin om 45 Rnull = 20 30 Rnull = 10
50 k
PHASE MARGIN vs LOAD CAPACITANCE
75 TA = 25C 60 Rnull = 100 Rnull = 50
800
600
15
VI
50 k
VDD + - + Rnull CL
Rnull = 0 10 4
400 -75
0 -50 -25 0 25 50 75 100 125 10 TA - Free-Air Temperature - C
VDD -/GND
10 2 10 3 CL - Load Capacitance - pF
Figure 56
GAIN MARGIN vs LOAD CAPACITANCE
20 RL = 50 k AV = 1 TA = 25C 15 Gain Margin - dB Rnull = 100 1000 TA = 25C B1 - Unity-Gain Bandwidth - kHz
Figure 57
UNITY-GAIN BANDWIDTH vs LOAD CAPACITANCE
800
10 Rnull = 50 Rnull = 20 5 Rnull = 10 Rnull = 0 10 2 10 3 CL - Load Capacitance - pF 10 4
600
400
0 10
Figure 58
For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V. Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
AA AA
200 10
10 2 10 3 CL - Load Capacitance - pF
10 4
Figure 59
37
SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
TYPICAL CHARACTERISTICS
OVERESTIMATION OF PHASE MARGIN vs LOAD CAPACITANCE
14 TA = 25C 12 Overestimation of Phase Margin 10 Rnull = 100
8 6 4 2 0 10 Rnull = 50
Rnull = 10
Rnull = 20
10 2 10 3 CL - Load Capacitance - pF
10 4
See application information
Figure 60
38
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
APPLICATION INFORMATION driving large capacitive loads
The TLV226x is designed to drive larger capacitive loads than most CMOS operational amplifiers. Figure 51 and Figure 52 illustrate its ability to drive loads greater than 400 pF while maintaining good gain and phase margins (Rnull = 0). A smaller series resistor (Rnull) at the output of the device (see Figure 61) improves the gain and phase margins when driving large capacitive loads. Figure 51 and Figure 52 show the effects of adding series resistances of 10 , 20 , 50 , and 100 . The addition of this series resistor has two effects: the first is that it adds a zero to the transfer function and the second is that it reduces the frequency of the pole associated with the output load in the transfer function. The zero introduced to the transfer function is equal to the series resistance times the load capacitance. To calculate the improvement in phase margin, equation (1) can be used. m1 + tan -1 2 x x UGBW x R null xC L (1)
Where : m1 + improvement in phase margin UGBW + unity-gain bandwidth frequency R null + output series resistance C L + load capacitance The unity-gain bandwidth (UGBW) frequency decreases as the capacitive load increases (see Figure 53). To use equation 1, UGBW must be approximated from Figure 53. Using equation 1 alone overestimates the improvement in phase margin as illustrated in Figure 59. The overestimation is caused by the decrease in the frequency of the pole associated with the load, providing additional phase shift and reducing the overall improvement in phase margin. The pole associated with the load is reduced by the factor calculated in equation 2. F+ 1 1 ) g m x R null (2)
Where : F + factor reducing frequency of pole g m + small-signal output transconductance (typically 4.83 x 10 - 3 mhos) R null + output series resistance For the TLV226x, the pole associated with the load is typically 7 MHz with 100-pF load capacitance. This value varies inversely with CL: at CL = 10 pF, use 70 MHz, at CL = 1000 pF, use 700 kHz, and so on. Reducing the pole associated with the load introduces phase shift, thereby reducing phase margin. This results in an error in the increase in phase margin expected by considering the zero alone (equation 1). Equation 3 approximates the reduction in phase margin due to the movement of the pole associated with the load. The result of this equation can be subtracted from the result of the equation 1 to better approximate the improvement in phase margin.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
39
SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
APPLICATION INFORMATION driving large capacitive loads (continued)
m2 + tan -1 UGBW - tan -1 UGBW P2 F x P2 Where : m2 + reduction in phase margin (3)
UGBW + unity-gain bandwidth frequency F + factor from equation (2) P 2 + unadjusted pole (70 MHz @ 10 pF, 7 MHz @ 100 pF, etc.)
Using these equations with Figure 60 and Figure 61 enables the designer to choose the appropriate output series resistance to optimize the design of circuits driving large capacitive loads.
50 k
VDD + 50 k VI - + VDD - / GND Rnull CL
Figure 61. Series-Resistance Circuit
40
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
TLV226x, TLV226xA Advanced LinCMOS RAIL TO RAIL OPERATIONAL AMPLIFIERS
SLOS186C - FEBRUARY 1997 - REVISED AUGUST 2006
APPLICATION INFORMATION macromodel information
Macromodel information provided was derived using Microsim Parts, the model generation software used with Microsim PSpice. The Boyle macromodel (see Note 5) and subcircuit in Figure 62 are generated using the TLV226x typical electrical and operating characteristics at TA = 25C. Using this information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):
D D D D D D
Maximum positive output voltage swing Maximum negative output voltage swing Slew rate Quiescent power dissipation Input bias current Open-loop voltage amplification
D D D D D D
Unity-gain frequency Common-mode rejection ratio Phase margin DC output resistance AC output resistance Short-circuit output current limit
NOTE 5: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, "Macromodeling of Intergrated Circuit Operational Amplifiers," IEEE Journal of Solid-State Circuits, SC-9, 353 (1974). 99 VCC + RSS RP 2 IN - DP IN + 1 11 RD1 VAD VCC - + - 4 C1 12 RD2 60 54 - VE .SUBCKT TLV226x 1 2 3 4 5 C1 11 12 5.5E-12 C2 6 7 20.00E-12 DC 5 53 DX DE 54 5 DX DLP 90 91 DX DLN 92 90 DX DP 4 3 DX EGND 99 0 POLY (2) (3,0) (4,0) 0 .5 .5 FB 7 99 POLY (5) VB VC VE VLP + VLN 0 8.84E6 -10E6 10E6 10E6 -10E6 GA 6 0 11 12 62.83E-6 GCM 0 6 10 99 12.34E-9 ISS 3 10 DC 11.05E-6 HLIM 90 0 VLIM 1K J1 11 2 10 JX J2 12 1 10 JX R2 6 9 100.0E3 + OUT RD1 60 11 15.92E3 RD2 60 12 15.92E3 R01 8 5 135 R02 7 99 135 RP 3 4 15.87E3 RSS 10 99 18.18E6 VAD 60 4 -.5 VB 9 0 DC 0 VC 3 53 DC .615 VE 54 4 DC .615 VLIM 7 8 DC 0 VLP 91 0 DC 1 VLN 0 92 DC 5.1 .MODEL DX D (IS=800.0E-18) .MODEL JX PJF (IS=500.0E-15 BETA=325E-6 + VTO=-.08) .ENDS DE 5 RO1 DC J1 10 J2 3 9 ISS + VC R2 - 53 6 GCM + VB - C2 7 + GA VLIM 8 - - EGND + FB RO2 90 + DLP - 91 + VLP - DLN 92 - VLN +
HLIM
Figure 62. Boyle Macromodel and Subcircuit
PSpice and Parts are trademarks of MicroSim Corporation.
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41
PACKAGE OPTION ADDENDUM
www.ti.com
6-Dec-2006
PACKAGING INFORMATION
Orderable Device 5962-9550401Q2A 5962-9550401QHA 5962-9550401QPA 5962-9550402Q2A 5962-9550402QCA 5962-9550402QDA 5962-9550403Q2A 5962-9550403QHA 5962-9550403QPA 5962-9550404Q2A 5962-9550404QCA 5962-9550404QDA TLV2262AID TLV2262AIDG4 TLV2262AIDR TLV2262AIDRG4 TLV2262AIP TLV2262AIPE4 TLV2262AIPW TLV2262AIPWG4 TLV2262AIPWLE TLV2262AIPWR TLV2262AIPWRG4 TLV2262AMFKB TLV2262AMJGB TLV2262AMUB TLV2262AQD TLV2262AQDR TLV2262ID TLV2262IDG4 TLV2262IDR TLV2262IDRG4 Status (1) ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE Package Type LCCC CFP CDIP LCCC CDIP CFP LCCC CFP CDIP LCCC CDIP CFP SOIC SOIC SOIC SOIC PDIP PDIP TSSOP TSSOP TSSOP TSSOP TSSOP LCCC CDIP CFP SOIC SOIC SOIC SOIC SOIC SOIC Package Drawing FK U JG FK J W FK U JG FK J W D D D D P P PW PW PW PW PW FK JG U D D D D D D Pins Package Eco Plan (2) Qty 20 10 8 20 14 14 20 10 8 20 14 14 8 8 8 8 8 8 8 8 8 8 8 20 8 10 8 8 8 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 75 75 TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Lead/Ball Finish MSL Peak Temp (3)
POST-PLATE N / A for Pkg Type A42 SNPB A42 SNPB A42 SNPB A42 SNPB A42 SNPB A42 SNPB A42 SNPB A42 SNPB CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI CU NIPDAU CU NIPDAU N / A for Pkg Type N / A for Pkg Type N / A for Pkg Type N / A for Pkg Type N / A for Pkg Type N / A for Pkg Type N / A for Pkg Type N / A for Pkg Type Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM N / A for Pkg Type N / A for Pkg Type Level-1-260C-UNLIM Level-1-260C-UNLIM Call TI Level-1-260C-UNLIM Level-1-260C-UNLIM
POST-PLATE N / A for Pkg Type
POST-PLATE N / A for Pkg Type
POST-PLATE N / A for Pkg Type
2500 Green (RoHS & no Sb/Br) 2500 Green (RoHS & no Sb/Br) 50 50 150 150 Pb-Free (RoHS) Pb-Free (RoHS) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD 2000 Green (RoHS & no Sb/Br) 2000 Green (RoHS & no Sb/Br) 1 1 1 75 2500 75 75 TBD TBD TBD TBD TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
POST-PLATE N / A for Pkg Type A42 SNPB A42 SNPB CU NIPDAU Call TI CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU N / A for Pkg Type N / A for Pkg Type Level-1-220C-UNLIM Call TI Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM
2500 Green (RoHS & no Sb/Br) 2500 Green (RoHS & no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
6-Dec-2006
Orderable Device TLV2262IP TLV2262IPE4 TLV2262IPW TLV2262IPWG4 TLV2262IPWR TLV2262IPWRG4 TLV2262MFKB TLV2262MJGB TLV2262MUB TLV2262QD TLV2262QDR TLV2264AID TLV2264AIDG4 TLV2264AIDR TLV2264AIDRG4 TLV2264AIN TLV2264AINE4 TLV2264AIPW TLV2264AIPWG4 TLV2264AIPWLE TLV2264AIPWR TLV2264AIPWRG4 TLV2264AMFKB TLV2264AMJB TLV2264AMWB TLV2264AQD TLV2264AQDR TLV2264ID TLV2264IDG4 TLV2264IDR
Status (1) ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE
Package Type PDIP PDIP TSSOP TSSOP TSSOP TSSOP LCCC CDIP CFP SOIC SOIC SOIC SOIC SOIC SOIC PDIP PDIP TSSOP TSSOP TSSOP TSSOP TSSOP LCCC CDIP CFP SOIC SOIC SOIC SOIC SOIC
Package Drawing P P PW PW PW PW FK JG U D D D D D D N N PW PW PW PW PW FK J W D D D D D
Pins Package Eco Plan (2) Qty 8 8 8 8 8 8 20 8 10 8 8 14 14 14 14 14 14 14 14 14 14 14 20 14 14 14 14 14 14 14 50 50 150 150 Pb-Free (RoHS) Pb-Free (RoHS) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
Lead/Ball Finish CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU
MSL Peak Temp (3) N / A for Pkg Type N / A for Pkg Type Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM
2000 Green (RoHS & no Sb/Br) 2000 Green (RoHS & no Sb/Br) 1 1 1 75 2500 50 50 TBD TBD TBD TBD TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
POST-PLATE N / A for Pkg Type A42 SNPB A42 SNPB CU NIPDAU Call TI CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI CU NIPDAU CU NIPDAU N / A for Pkg Type N / A for Pkg Type Level-1-220C-UNLIM Call TI Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM N / A for Pkg Type N / A for Pkg Type Level-1-260C-UNLIM Level-1-260C-UNLIM Call TI Level-1-260C-UNLIM Level-1-260C-UNLIM
2500 Green (RoHS & no Sb/Br) 2500 Green (RoHS & no Sb/Br) 25 25 90 90 Pb-Free (RoHS) Pb-Free (RoHS) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD 2000 Green (RoHS & no Sb/Br) 2000 Green (RoHS & no Sb/Br) 1 1 1 50 2500 50 50 TBD TBD TBD TBD TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
POST-PLATE N / A for Pkg Type A42 SNPB A42 SNPB CU NIPDAU Call TI CU NIPDAU CU NIPDAU CU NIPDAU N / A for Pkg Type N / A for Pkg Type Level-1-220C-UNLIM Call TI Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM
2500 Green (RoHS & no Sb/Br)
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
6-Dec-2006
Orderable Device TLV2264IDRG4 TLV2264IN TLV2264INE4 TLV2264IPWR TLV2264IPWRG4 TLV2264MFKB TLV2264MJ TLV2264MJB TLV2264MWB TLV2264QD TLV2264QDR
(1)
Status (1) ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE
Package Type SOIC PDIP PDIP TSSOP TSSOP LCCC CDIP CDIP CFP SOIC SOIC
Package Drawing D N N PW PW FK J J W D D
Pins Package Eco Plan (2) Qty 14 14 14 14 14 20 14 14 14 14 14 2500 Green (RoHS & no Sb/Br) 25 25 Pb-Free (RoHS) Pb-Free (RoHS)
Lead/Ball Finish CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU
MSL Peak Temp (3) Level-1-260C-UNLIM N / A for Pkg Type N / A for Pkg Type Level-1-260C-UNLIM Level-1-260C-UNLIM
2000 Green (RoHS & no Sb/Br) 2000 Green (RoHS & no Sb/Br) 1 1 1 1 50 2500 TBD TBD TBD TBD TBD TBD
POST-PLATE N / A for Pkg Type A42 SNPB A42 SNPB A42 SNPB CU NIPDAU Call TI N / A for Pkg Type N / A for Pkg Type N / A for Pkg Type Level-1-220C-UNLIM Call TI
The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 3
MECHANICAL DATA
MCER001A - JANUARY 1995 - REVISED JANUARY 1997
JG (R-GDIP-T8)
0.400 (10,16) 0.355 (9,00) 8 5
CERAMIC DUAL-IN-LINE
0.280 (7,11) 0.245 (6,22)
1
4 0.065 (1,65) 0.045 (1,14)
0.063 (1,60) 0.015 (0,38)
0.020 (0,51) MIN
0.310 (7,87) 0.290 (7,37)
0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN
0.023 (0,58) 0.015 (0,38) 0.100 (2,54) 0.014 (0,36) 0.008 (0,20)
0-15
4040107/C 08/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for terminal identification. Falls within MIL STD 1835 GDIP1-T8
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MECHANICAL DATA
MLCC006B - OCTOBER 1996
FK (S-CQCC-N**)
28 TERMINAL SHOWN
LEADLESS CERAMIC CHIP CARRIER
18
17
16
15
14
13
12
NO. OF TERMINALS ** 11 10 28 9 8 7 6 68 5 84 44 52 20
A MIN 0.342 (8,69) 0.442 (11,23) 0.640 (16,26) 0.739 (18,78) 0.938 (23,83) 1.141 (28,99) MAX 0.358 (9,09) 0.458 (11,63) 0.660 (16,76) 0.761 (19,32) 0.962 (24,43) 1.165 (29,59) MIN 0.307 (7,80) 0.406 (10,31) 0.495 (12,58) 0.495 (12,58) 0.850 (21,6) 1.047 (26,6)
B MAX 0.358 (9,09) 0.458 (11,63) 0.560 (14,22) 0.560 (14,22) 0.858 (21,8) 1.063 (27,0)
19 20 21 B SQ 22 A SQ 23 24 25
26
27
28
1
2
3
4 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25)
0.020 (0,51) 0.010 (0,25)
0.055 (1,40) 0.045 (1,14)
0.045 (1,14) 0.035 (0,89)
0.028 (0,71) 0.022 (0,54) 0.050 (1,27)
0.045 (1,14) 0.035 (0,89)
4040140 / D 10/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. Falls within JEDEC MS-004
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MECHANICAL DATA
MPDI001A - JANUARY 1995 - REVISED JUNE 1999
P (R-PDIP-T8)
0.400 (10,60) 0.355 (9,02) 8 5
PLASTIC DUAL-IN-LINE
0.260 (6,60) 0.240 (6,10)
1
4 0.070 (1,78) MAX 0.325 (8,26) 0.300 (7,62) 0.015 (0,38) 0.200 (5,08) MAX Seating Plane 0.125 (3,18) MIN 0.010 (0,25) NOM Gage Plane
0.020 (0,51) MIN
0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.010 (0,25) M
0.430 (10,92) MAX
4040082/D 05/98 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
POST OFFICE BOX 655303
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MECHANICAL DATA
MTSS001C - JANUARY 1995 - REVISED FEBRUARY 1999
PW (R-PDSO-G**)
14 PINS SHOWN
PLASTIC SMALL-OUTLINE PACKAGE
0,65 14 8
0,30 0,19
0,10 M
0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 A 7 0- 8 0,75 0,50
Seating Plane 1,20 MAX 0,15 0,05 0,10
PINS ** DIM A MAX
8
14
16
20
24
28
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
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